000 00845nam a2200265 4500
001 00568309
003 PWmBRO
005 20240602100826.0
008 860617s1985 maua a o0011 eng l
082 0 0 _a621.3819
_b5835
_z19
090 0 0 _b621.3819
_b5835/K19r
100 1 0 _aKatevenis, Manolis G. H.
245 1 0 _aReduced instruction set computer architectures for VLSI
_cManolis G.H. Katevenis
260 0 0 _aCambridge, Mass
_bMIT Press
_cc1985
300 0 0 _a215 p.
_bill
_c24 cm.
490 1 0 _aACM doctoral dissertation awards
_v1984
500 0 0 _aIncludes index
595 0 0 _a0262111039
650 0 0 _aComputer architecture
650 0 0 _aIntegrated circuits
_xVery large scale integration
840 0 0 _aACM doctoral dissertation award
_v1984
942 _2ddc
994 _a001045614 86304 0001
999 _c32159
_d32159